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DISCRETE SEMICONDUCTORS
DATA SHEET
BSP128 N-channel enhancement mode vertical D-MOS transistor
Product specification File under Discrete Semiconductors, SC13b April 1995
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
FEATURES * Direct interface to C-MOS, TTL, etc. * High-speed switching * No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 envelope and intended for use as a line current interruptor in telephone sets and for applications in relay, high-speed and line transformer drivers. PINNING - SOT223
1 2 3
MAM054
BSP128
QUICK REFERENCE DATA SYMBOL VDS ID RDS(on) VGS(th) PARAMETER drain-source voltage DC drain current drain-source on-resistance gate-source threshold voltage MAX. 200 350 8 1.8 UNIT V mA V
handbook, halfpage
4
d
g
s
PIN 1 2 3 4 gate drain
DESCRIPTION Code: BSP128
Top view
source drain
Fig.1 Simplified outline (SOT223) and symbol.
LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL VDS VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source voltage gate-source voltage DC drain current peak drain current total power dissipation storage temperature range junction temperature up to Tamb = 25 C (note 1) open drain CONDITIONS - - - - - -65 - MIN. MAX. 200 20 350 1.4 1.5 150 150 UNIT V V mA A W C C
THERMAL RESISTANCE SYMBOL Rth j-a Note 1. Device mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 cm2. PARAMETER from junction to ambient (note 1) THERMAL RESISTANCE 83.3 K/W
April 1995
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS IDSS IGSS VGS(th) RDS(on) Yfs Ciss Coss Crss ton toff PARAMETER drain-source breakdown voltage drain-source leakage current gate-source leakage current gate-source threshold voltage drain-source on-resistance transfer admittance input capacitance output capacitance feedback capacitance CONDITIONS ID = 10 A; VGS = 0 VDS = 160 V; VGS = 0 VGS = 20 V; VDS = 0 ID = 1 mA; VGS = VDS ID = 100 mA; VGS = 2.8 V ID = 300 mA; VDS = 25 V VDS = 25 V; VGS = 0; f = 1 MHz VDS = 25 V; VGS = 0; f = 1 MHz VDS = 25 V; VGS = 0; f = 1 MHz ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V MIN. 200 - - 0.4 - 200 - - - - -
BSP128
TYP. MAX. UNIT - - - - 5 400 50 20 5 - 1 100 1.8 8 - 80 30 10 V A nA V mS pF pF pF
Switching times (see Figs 2 and 3) turn-on time turn-off time 5 20 10 30 ns ns
handbook, halfpage
VDD = 50 V
handbook, halfpage
90 %
INPUT 10 %
10 V 0V ID 50
MBB691
90 % OUTPUT 10 % ton toff
MBB692
VDD = 50 V.
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
April 1995
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
PACKAGE OUTLINE Plastic surface mounted package; collector pad for good heat transfer; 4 leads
BSP128
SOT223
D
B
E
A
X
c y HE b1 vMA
4
Q A A1
1
e1 e
2
bp
3
wM B detail X
Lp
0
2 scale
4 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.8 1.5 A1 0.10 0.01 bp 0.80 0.60 b1 3.1 2.9 c 0.32 0.22 D 6.7 6.3 E 3.7 3.3 e 4.6 e1 2.3 HE 7.3 6.7 Lp 1.1 0.7 Q 0.95 0.85 v 0.2 w 0.1 y 0.1
OUTLINE VERSION SOT223
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 96-11-11 97-02-28
April 1995
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS
BSP128
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
April 1995
5
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
NOTES
BSP128
April 1995
6
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
NOTES
BSP128
April 1995
7
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
137107/1200/01/pp8
Date of release: April 1995
Document order number:
9397 750 02476

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